Second Keynote speech by Prof. Jose Duato Marín

Prof. Jose Duato Marín from the Universidad Politécnica de Valencia will deliver the Second Keynote Speech at EDCC-2010 entitled:

Addressing heterogeneity, failures and variability in high-performance NoCs”

Abstract: Although most research on NoCs has assumed the use of regular topologies like 2D meshes, some current trends in chip architecture, combined with expected technology limitations and usage models, will very likely oblige designers to consider less regular topologies to provide the best cost-performance trade-off. Moreover, the set of nodes interconnected by those NoCs will also be heterogeneous, including computational cores of different sizes and computing power, cache blocks and local stores, accelerators of different kinds, and memory controllers. The memory wall problem will likely be addressed by using 3D integration, which will increase heterogeneity significantly, due to the need for locating the hottest cores in the top layer. Manufacturing failures and variability will also introduce heterogeneity.

Therefore, in order to deliver the best cost-performance trade-off while minimizing resource and power consumption and providing the maximum flexibility, heterogeneity needs appropriate hardware support in the NoC. This talk motivates the need for efficiently supporting  heterogeneity, and sketches some results along this direction, describing power-efficient routing algorithms that provide support for multiple heterogeneous, possibly overlapping regions (e.g. virtual machines, coherence domains) in the presence of faulty components. The talk also shows how a hierarchical interconnect (on-chip, on-substrate) can significantly shorten design cost and time to market.

Speaker’s vita: Jose Duato received the MS and PhD degrees in electrical engineering from the Technical University of Valencia, Spain, in 1981 and 1985, respectively. Currently, Dr. Duato is Professor in the Department of Computer Engineering (DISCA) at the same university. He was also an adjunct professor in the Department of Computer and Information Science, The Ohio State University.

His current research interests include interconnection networks and multiprocessor architectures. Prof. Duato has published over 400 refereed papers. He proposed a powerful theory of deadlock-free adaptive routing for wormhole networks. Versions of this theory have been used in the design of the routing algorithms for the MIT Reliable Router, the Cray T3E supercomputer, the on-chip router of the Alpha 21364 microprocessor, and the IBM BlueGene/L supercomputer. Prof. Duato also developed RECN, the only truly scalable congestion management technique proposed to date, and a very efficient routing algorithm for fat trees that has been incorporated into Sun Microsystem’s 3456-port InfiniBand Magnum switch. Currently, Prof. Duato leads the Advanced Technology Group in the HyperTransport Consortium, which developed the High Node Count HyperTransport Specification 1.0 to extend the device addressing capabilities of HyperTransport in several orders of magnitude.

In 2009, Prof. Duato recently received the prestigious award “Julio Rey Pastor“, in the field of mathematics and information technologies and the communications, for his contributions of international importance in the field of the interconnection networks and for the transference of these results to the industry.

Presentation: pptx, pdf

[Post updated 17/5/2010]