Current situation

I am a Full Professor in University Jean-Monnet of Saint-Etienne. I am doing my research in the SESAM (Secure Embedded Systems & Hardware Architectures) team of the Hubert-Curien Laboratory .

Research interests

• Hardware security
• AI for embedded systems
• Manycore architectures
• Network-on-Chips (NoCs)
• Emerging technologies
• Low power design
• Computer engineering
• Hardware security
• Approximate computing
• Hardware accelerators
• Fault tolerant architectures

Scientific supervisions

PhD students

• S. Baissat-Chavent, Heterogeneous SoC Secured by Design , november 2023.
  Co-supervised with L. Bossuet.

• G. Lomet, Guess what I'm learning (security for AI on FPGA), november 2022.
  Co-supervised with O. Sentieys, and R. Salvador (IETR).

• H. Amara, security of emerging NoCs, october 2022.
  Co-supervised with D. Chillet, and E. Casseau.

• W. Guilleme, Fault Tolerant On-Chip Interconnects for Artificial Intelligence Algorithms, october 2022.
  Co-supervised with D. Chillet, A. Kritikakou, and Y. Helen (DGA).

• I. Krayem, Fault tolerant emerging on-chip interconnects for manycore architectures, october 2020.
  Co-supervised with D. Chillet

• J. Lee, Energy-Performance tradeoffs in Optical NoCs, December 2018.
  Co-supervised with D. Chillet.
  Defended on December 8, 2022. Manuscript link

• R. Mercier, Fault Tolerant Network on Chip for Deep Learning Algorithms, October 2018.
  Co-supervised with D. Chillet, A. Kritikakou, and Y. Helen (DGA).
  Defended on December 17, 2021. Manuscript link

• V. D. Pham, Design space exploration in the context of 3D integration of multiprocessors interconnected by Optical Network-on-Chip, april 2015.
  Co-supervised with D. Chillet, O. Sentieys, and S. Le Beux.
  Defended on December 13, 2018. Manuscript link

• J. Luo, Design space and communication protocol explorations for Optical Network-on-Chip on 3D architecture under energy efficiency constraints, november 2014,
  Co-supervised with D. Chillet, and S. Le Beux.
  Defended on July 11, 2018. Manuscript link

• R. Ragavan, Ultra-Low Power Reconfigurable Architectures for Computing and Control in Wireless Sensor Networks , november 2013.
  Co-supervised with O. Sentieys.
  Defended on September 22, 2017. Manuscript link

Post Doctoral Researchers

• A. Das - December 2021 to February 2023
• R. Mercier - January 2022 to September 2022
• Y. Aggrawal - January to December 2021
• J. Ortiz - June 2020 to December 2021
• A. El Antably - May 2016 to September 2017
• M. Sepulveda - November 2014 to October 2015

Research projects

Project coordinator (PC)

• French National Research Agency (ANR) young researcher grant "SHNoC", 2018-2023
• Scientific challenge grant University of Rennes 1, 2019
• Scientific challenge University of Rennes 1, 2016

Participation in National research projects

• ANR PRC "Rakes" 2019-2023 - As PI for my laboratory
  Consortium: TIMA (PC), IRISA/Inria, Lab-STICC
• ANR PRCE "Opticall2" 2018-2023 - As PI for my laboratory
  INL (PC), IRISA/Inria, C2N, CEA-LETI, Kalray
• Labex CominLabs 3D Optical Manycore 2014-2018 - As co-PI for my laboratory
  IConsortium: FOTON (PC), Inria, and INL

Services

• Conference organization:
• Technical Program Comittee for IEEE/ACM International Design, Automation & Test in Europe Conference & Exhibition (DATE) 2023
• Technical Program Comittee for IEEE/ACM International Symposium on Networks-on-Chip (NOCS) 2020, 2021, 2022
• Technical Program Comittee for International Workshop NOCARC 2022
• Local Arrangement for the Internation Symposium on Applied Reconfigurable Computing (ARC) 2021
• Program comittee for Design of Circuits and Integrated Systems (DCIS) 2018
• Scientific comittee for International Conference on Embedded Systems in Telecommunications and Instrumentations (ICESTI) 2014, 2016 and 2019
• Organization of the Emerging Interconnect Technologies in ManyCore architectures thematic workshop of the GDR SoC². Paris, France, 27 November 2017.
• Reviewer for journal:
• IEEE Computer
• ACM Transactions on Embedded Computing Systems (ACM TECS)
• IEEE Transactions on Multi-Scale Computing Systems (IEEE TMSCS)
• IEEE Transactions on Very Large Scale Integration (IEEE TVLSI)
• IEEE Embedded System Letter (IEEE ESL)
• IEEE Transactions on Dependable and Secure Computing (IEEE TDSC)
• ACM ACM Journal on Emerging Technologies in Computing Systems (ACM JETC)
• Electronics and Telecommunications Research Institute (ETRI)
• Springer Journal of Design Automation for Embedded Systems (DAEM)
• Reviewer for international conferences:
• International Symposium on Networks-on-Chip (NOCS)
• Conference on Design & Architectures for Signal & Image Processing (DASIP)
• Design, Automation & Test in Europe Conference & Exhibition (DATE)
• Conference on Field Programmable Logic and Applications (FPL)
• International Symposium on Computer Architecture (ISCA)
• International Conference on New Circuits and Systems (NEWCAS)
• Other responsabilities
• Elected Member of the research committee of the IUT Lannion, 2013-2023
• Member of the institute board of the IUT Lannion, since 2018
• Member of the IAEM Scientific Pole (now AM2I) , University of Lorraine, april-december 2012

List of selected papers

• I. Krayem, J. Ortiz Sosa, C. Killian and D. Chillet, "Analytical Model for Performance Evaluation of Token-Passing-Based WiNoCs," IEEE Design & Test, vol. 40, no. 6, pp. 136-148, Dec. 2023.
• P. Zolfaghari, J. Ortiz, C. Killian, S. Le Beux, “Non-Volatile Phase Change Material based Reconfigurable Nanophotonic Interconnect“, Design, Automation & Test in Europe Con- ference & Exhibition (DATE’22), Antwerp, Belgium, March 2022.
• J. Lee, C. Killian, S. Le Beux, and D. Chillet, “Distance Aware Approximate Nanopho- tonic Interconnect,” ACM Transactions on Design Automation of Electronic Systems (ACM TODAES), March 2022.
• R. Mercier, C. Killian, A. Kritikakou, Y. Helen and D. Chillet, “BiSuT: A NoC-Based Bit-Shuffling Technique for Multiple Permanent Faults Mitigation,” IEEE Transaction on Computing-Aided Design of Integrated Circuits and Systems (IEEE TCAD), July 2021.
• R. Mercier, C. Killian, A. Kritikakou, Y. Helen and D. Chillet, " A Region-Based Bit- Shuffling Approach Trading Hardware Cost and Fault Mitigation Efficiency," 2021 IEEE 34th International International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’21), Athens, Greece, 2021.
• R. Mercier, C. Killian, A. Kritikakou, Y. Helen and D. Chillet, "Multiple Permanent Faults Mitigation Through Bit-Shuffling for Network-on-Chip Architecture," 2020 IEEE 38th International Conference on Computer Design (ICCD'20), Hartford, CT, USA, 2020, pp. 205-212.
• J. Lee, C. Killian, S. L. Beux, D. Chillet, “Approximate nanophotonic interconnects”, 13th IEEE/ACM International Symposium on Networks-on-Chip (NoCs’19), New York, United States, ACM, October 2019
• J. O. Sosa, O. Sentieys, C. Roland, C. Killian, “Multi-Carrier Spread-Spectrum Transceiver for WiNoC”, 13th IEEE/ACM International Symposium on Networks-on-Chip (NoCs’19), New York, United States, ACM, October 2019
• J. Luo, C. Killian, S. Le Beux, D. Chillet, O. Sentieys, and I. O’Connor, "Offline Optimization of Wavelength Allocation and Laser Power in Nanophotonic Interconnects, " ACM Journal on Emerging Technologies in Computing Systems (ACM JETC). Vol. 14, no. 2, July 2018
• C. Killian, D. Chillet, S. Le Beux, V-D Pham, O. Sentieys, and I. O'Connor, "Energy and Performance Trade-off in Nanophotonic Interconnects using Coding Techniques", Design Automation Conference 2017 (DAC'17), Austin, U.S.A., June 2017
• J. Luo, A. Elantaly, V. D. Pham, C. Killian, D. Chillet, S. Le Beux, O. Sentieys, I. O’Connor, "Performance and Energy Aware Wavelength Allocation on Ring-Based WDM 3D Optical NoC", Design, Automation & Test in Europe Conference & Exhibition ( DATE'17), Lausanne, Switzerland, March 2017
• R. Ragavan, B. Barrois, C. Killian, O. Sentieys, « Pushing the Limits of Voltage Over-Scaling for Error-Resilient Applications », Design, Automation & Test in Europe Conference & Exhibition (DATE'17), Lausanne, Switzerland, March 2017
• R. Ragavan, C. Killian, S. Sentieys, "Adaptive Overclocking and Error Correction based on Dynamic Speculation Window", IEEE Computer Society Annual Symposium on VLSI (ISVLSI'16), Pittsburgh, U.S.A., July 11-13, 2016
• C. Killian, C. Tanougast, A. Dandache, "Hybrid Fault Detection for Adaptive NoC", IEEE Embedded Systems Letters (ESL), pp. 69-72, 2013
• C. Killian, C. Tanougast, F. Monteiro, A. Dandache, "Smart Reliable Network-on-Chip", IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Volume 22, Issue 2, pp. 242-255, 2012

Invitation to scientific events

• Invited speaker at Optique 2021. " Tolerating errors in on-chip nanophotonic interconnects for improved energy efficiency". Dijon, France, July 2021.
• Invited speaker at OPTICS 2020 workshop. " Tolerating Errors in Nanophotonic Interconnects for a Better Energy Efficiency". Grenoble, France, march 2020.
• Invited speaker to the french winter school "Ecole d'hiver Francophone sur les Technologies de Conception des Systèmes embarqués Hétérogènes" (FETCH2020). "Approximate NoCs: communicating with errors", Session HW / SW et EDA. Montréal, Canada, 12-14 February 2020.
• Invited speaker at a thematic day from GDR SoC2 on on-chip interconnect, “SHNoC : technological obstacles and resolution methods”, Lyon, France, april 2019.
• Invited speaker at OPTICS 2019 workshop. "ONoCs: from offline optimization to run time adaptability". Florence, Italy, march 2019.
• Invited speaker to the french winter school "Ecole d'hiver Francophone sur les Technologies de Conception des Systèmes embarqués Hétérogènes" (FETCH2019). "SHNoC : Reliable Multi-Technologies Network-on-Chip", Session HW / SW et EDA. Louvain-la-Neuve, Belgique, 28-30 january 2019.
• Invited speaker at a thematic day from GDR SoC2 on photonics on silicon for computing architectures, “Digital architectures to enhance Optical NoCs efficiency”, Lyon, France, november 2018.
• Invited speaker at OPTICS 2018, Co-located with DATE 2018. "Offline optimization of wavelength allocation and laser to deal with Energy-Performance tradeoffs in nanophotonic interconnects". Dresden, Germany, 23 March 2018.
• Invited speaker to the french winter school "Ecole d'hiver Francophone sur les Technologies de Conception des Systèmes embarqués Hétérogènes" (FETCH2018). "Energy-performance tradeoffs in optical Network-on-Chips", Session Circuits Analogiques et Technologies Emergentes. Saint-Malo, France, 24-26 january 2018.