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Publications of year 2005
Articles in journal or book chapters
  1. N. Boullis and A. Tisserand. Some Optimizations of Hardware Multiplication by Constant Matrices. IEEE Transactions on Computers, 54(10):1271-1282, October 2005. [PDF] [doi:10.1109/TC.2005.168]


  2. F. de Dinechin and A. Tisserand. Multipartite Table Methods. IEEE Transactions on Computers, 54(3):319-330, March 2005. [PDF] [doi:10.1109/TC.2005.54]


Conference articles
  1. M. D. Ercegovac, J.-M. Muller, and A. Tisserand. Simple Seed Architectures for Reciprocal and Square Root Reciprocal. In Proc. 39th Asilomar Conference on Signals, Systems and Computers, Pacific Grove, California, U.S.A., pages 1167-1171, October 2005. IEEE. [PDF]


  2. C.-P. Jeannerod, S.-K. Raina, and A. Tisserand. High-Radix Floating-Point Division Algorithms for Embedded VLIW Integer Processors. In Proc. 17th World Congress on Scientific Computation, Applied Mathematics and Simulation IMACS, Paris, France, July 2005. [PDF]


  3. R. Michard, A. Tisserand, and N. Veyrat-Charvillon. Divgen: a divider unit generator. In F. T. Luk, editor, Proc. Advanced Signal Processing Algorithms, Architectures and Implementations XV, volume 5910, San Diego, California, U.S.A., pages 1-12, August 2005. SPIE. [doi:10.1117/12.614419]


  4. R. Michard, A. Tisserand, and N. Veyrat-Charvillon. Evaluation de polynômes et de fractions rationnelles sur FPGA avec des opérateurs à additions et décalages en grande base. In 10ème SYMPosium en Architectures nouvelles de machines (SYMPA), Le Croisic, France, pages 85-96, April 2005. [PDF]


  5. R. Michard, A. Tisserand, and N. Veyrat-Charvillon. Small FPGA polynomial approximations with $3$-bit coefficients and low-precision estimations of the powers of $x$. In S. Vassiliadis, N. Dimopoulos, and S. Rajopadhye, editors, Proc. 16th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Samos, Greece, pages 334-339, July 2005. IEEE Computer Society. Note: Best Paper Award. [PDF]


  6. R. Michard, A. Tisserand, and N. Veyrat-Charvillon. Étude statistique de l'activité de la fonction de sélection dans l'algorithme de E-méthode. In 5ème journées d'études Faible Tension Faible Consommation (FTFC), Paris, France, pages 61-65, May 2005. [PDF]


  7. J.-M. Muller, A. Tisserand, B. Dupont de Dinechin, and C. Monat. Division by Constant for the ST100 DSP Microprocessor. In P. Montuschi and E. Schwarz, editors, Proc. 17th Symposium on Computer Arithmetic (ARITH), Cape Cod, MA., U.S.A, pages 124-130, June 2005. IEEE Computer Society. [PDF]


  8. A. Tisserand. Algorithms and Number Systems for Hardware Computer Arithmetic. In International Symposium on Symbolic and Algebraic Computation (ISSAC), Beijing, China, July 2005. Note: Invited tutorial. [WWW]


Internal reports
  1. M. D. Ercegovac, J.-M. Muller, and A. Tisserand. Simple Seed Architectures for Reciprocal and Square Root Reciprocal. Research Report RR2005-49, Laboratoire de l'Informatique du Parallélisme (LIP), October 2005. Note: Also available as INRIA Research Report RR-5720. [POSTSCRIPT]


  2. C.-P. Jeannerod, S.-K. Raina, and A. Tisserand. High-Radix Floating-Point Division Algorithms for Embedded VLIW Integer Processors. Research Report RR2005-39, Laboratoire de l'Informatique du Parallélisme (LIP), September 2005. [POSTSCRIPT]


  3. R. Michard, A. Tisserand, and N. Veyrat-Charvillon. Small FPGA polynomial approximations with $3$-bit coefficients and low-precision estimations of the powers of $x$. Research Report RR2005-08, Laboratoire de l'Informatique du Parallélisme (LIP), February 2005. Note: Also available as INRIA Research Report RR-5503. [POSTSCRIPT]


  4. R. Michard, A. Tisserand, and N. Veyrat-Charvillon. Étude statistique de l'activité de la fonction de sélection dans l'algorithme de E-méthode. Research Report RR2005-25, Laboratoire de l'Informatique du Parallélisme (LIP), February 2005. Note: Also available as INRIA Research Report RR-5574. [PDF]


Miscellaneous
  1. A. Tisserand. Automatic Generation of Hardware Arithmetic Operators: a Small Example. Séminaire invité au LIRMM, March 2005.


  2. A. Tisserand. Méthode du logical effort. Cours École Thématique ARCHI05, March 2005. [WWW]


  3. A. Tisserand. bibword: a minor Emacs mode for keywords in BibTeX files. GPL software, 2005--2006. [WWW]


  4. A. Tisserand. seedgen: a VHDL Generator for Reciprocal and Inverse Square Root Seeds. GPL software, 2005--2006. [WWW]



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Last modified: Fri Jan 11 08:35:45 2013
Author: tisseran.


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