Arnaud TISSERAND

CNRS Senior Researcher ("directeur de recherche", DR2), IRISA Laboratory, CAIRN group in Lannion
University Rennes 1, ENSSAT

IMPORTANT

prj: PAVOIS, ARDyT, H-A-H, Reliasic


IEEE TC Associate Editor


Security Seminar DGA-IRISA

 

News and events (Archives)

Seminars on Security of Embedded Electronic Systems (DGA-IRISA)

Conferences 2016
July: WHEAT (Paris, France), Compas (Lorient, France), ARITH (Silicon Valley, USA), WAIFI (Ghent, Belgium)
Aug.: CHES (Santa Barbara, USA), AHSA (Limassol, Cyprus)
Oct.: DASIP (Rennes, France)
Nov.: JPCNFM (Montpellier, France)

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Research

Topics

Computer arithmetic: operations, elementary functions, number systems, secure operators, reliable arithmetic...

Applied cryptography: asymmetric cryptography in hardware or embedded software, (H)ECC operators and crypto-processor, protections/countermeasures against side channel attacks, cybersecurity/cyberdefense, ...

Hardware accelerators: arithmetic operators/accelerators on FPGAs, ASICs, GPUs and embedded multicores

Software libraries: arithmetic support for crypto and embedded systems, finite field arithmetic

VLSI design and CAD tools: ASIC and FPGA circuits, asynchronous circuits, low power consumption, circuit generation tools

Applications: embedded systems, digital security, cyber-security/defense, scientific computing, digital signal processing, image processing, digital control.

Current/Recent Professional Activities

2014-2015: Program Committee co-Chair of the 22nd IEEE Symposium on Computer Arithmetic (ARITH-22)

2015: President of the organisation committee of the french Rencontres Arithmétiques de l'Informatique Mathématique (RAIM 2015)

2014+: Associate Editor of the IEEE Transactions on Computers

2013-2014: co-President of the french Conférence d'informatique en Parallélisme, Architecture et Système (ComPAS 2014)

2012-2015: Nominated member of the French National Council of Universities for computer science CNU 27 (co-organisateur de la session de Qualifs MdC 2015)

2012-2015: Elected member of the Scientific Council of University Rennes 1 (and member of the "HDR commission")

2011+: Nominated member of the Scientific Council of ENSSAT Engineering School

Current/Recent Collaborations

2014-2017: Reliasic project with IRISA, Lab-STICC, IETR (funded by Labex CominLabs and Brittany Region)

2014-2017: H-A-H (Hardware and Arithmetic for Hyperelliptic Curves Cryptography) project with IRISA, IRMAR (funded by Labex CominLabs, Labex Lebesgue and Brittany Region)

2012-2016: PAVOIS project with IRISA, LIRMM (funded by ANR Programme "Blanc" 2012)

2012-2014: CNRS PICS Project SPiNaCH (Secure and low-Power sensor Networks Circuits for Healthcare embedded applications) with Codes and Cryptography Research Group, University College Cork, Ireland

2011-2016: ARDYT (Reliable and Reconfigurable Dynamic Architecture) project with IRISA, Lab-STICC, LCIM and Atmel (funded by ANR Programme "Ingénerie Numérique et Sécurité" 2011)

Awards

Prix du meilleur papier à Compas 2015, "track" architecture, pour Comparaison expérimentale d'architectures de crypto-processeurs pour courbes elliptiques et hyper-elliptiques avec Gabriel Gallin et Nicolas Veyrat-Charvillon

Best paper award with Romain Michard and Nicolas Veyrat-Charvillon at ASAP 2005 for our paper on Small FPGA polynomial approximations with 3-bit coefficients and low-precision estimations of the powers of x [PDF]

Some presentations

Invited presentation at ECC (September 2015) on Hardware Accelerators for ECC and HECC

Invited seminar at Aric (April 2013) on Arithmetic Level Countermeasures for ECC Cryptoprocessors Against Side Channel Attacks

Invited cryptography seminar at IRMAR (June 2012) on Circuits for True Random Number Generation with On-Line Quality Monitoring

Invited talk at Journée sécurité numérique du GDR SoC-SiP (Nov. 2011) on Hardware Arithmetic Operators for Elliptic Curve Cryptography (ECC)

Talk at SAV CAIRN 2010 (Dec. 2010) on Examples of Standard and Exotic Number Systems

Seminar at the Electrical & Computer Engineering Departement, University of Massachussets Amherst (Nov. 10): Hardware Evaluation of Functions using Optimized Polynomial Approximations

Invited seminar at the Center for Advanced Security Research Darmstadt (CASED) Germany (Apr. 2010): Secured Arithmetic Operators for Cryptography

Invited seminar at the Computer Science and Telecommunications Departement, École Normale Supérieure de Cachan, antenne de Bretagne (Mar. 2010): Exotic Number Systems for Hardware Arithmetic Operators

CAIRN seminar, Nov. 2009: Introduction to Elliptic Curve Cryptography (ECC) Hardware Implementation

Invited seminar at the Electrical & Computer Engineering Departement, University of Massachussets Amherst (Nov. 09): Secured Arithmetic Operators for Cryptography

Some links

Symposia on Computer Arithmetic ARITH (main link), editions:

Seminars on Seminar on Security of Embedded Electronic Systems (DGA-IRISA)

Links to colleagues and groups

SAGE: a free open-source mathematics software system (book in french)

GDR du CNRS : ASR (ex ARP), IM (ex ALP), ISIS, SOC

ACM: digital library, conferences, publications, special interest groups [ SIGACT, SIGARCH, SIGBED, SIGDA, SIGMICRO, SIGSAC ]

IACR

IEEE: digital library, societies : [ CAS, CS, ITS, SSCS ]

Création du Groupe Thématique SMAI-MAIRCI

Société informatique de France (SIF)

Bulletin de la société informatique de France

Agence pour les mathématiques en interaction avec l'entreprise et la société (AMIES)

Workshops CryptArchi

Edition: International Journal of High Performance Systems Architecture

Interstices (site de culture scientifique autour de l'informatique)

Images des mathématiques

Chercheur français, une espèce en voie de disparition ? / French researcher, a critically endangered species?

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Publications (Complete list / co-authors)

Some recent publications

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Students (Complete list)

Current PhD students

Franck Bucheron, (5th year/5, part time 50%), DGA-IRISA, co-advisors: B. Martin and L. Rilling

Gabriel Gallin, (2st year/3), CNRS-IRISA (HAH project)

Audrey Lucas, (1st year/3), CNRS-IRISA (DGA-PEC grant)

Vincent Migliore, (2nd year/3), DGA-LabSTICC, main-advisor: G. Gogniat, co-advisor: C. Fontaine

Geneviève Ndour, (1st year/3), CEA-LETI, co-advisor: A. Molnos

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Software/Hardware

ECC Crypto-Processor
Free hardware processor for elliptic curve cryptography and its programming software [under development in the PAVOIS ANR project]
PACE
Prototyping Arithmetic in Cryptography Easily [collaboration with ARITH group LIRMM]
Seedgen
Seeds circuit generator (1/x and 1/sqrt(x)) [WWW]
MEPLib
Machine Efficient Polynomial Library [WWW]
Divgen
A divider unit generator : [WWW]
FLIP
Floating-Point Library for Integer Processors : [WWW]
On-line arithmetic library
VHDL on-line operators library (radix-2 representation)
Bibword
A minor Emacs mode for keywords in BibTeX files [WWW] beta version available

Links on softwares: AFUL

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Teaching / Enseignement (Archives)

Remark: my courses are mainly in French but I can prepare support in English on demand

Enseignements

Opérateurs arithmétiques & Arithmétique des ordinateurs
Master 2 Recherche SISEA (Université Rennes 1), 2008-2015, (CM 6h/an)
ENS Rennes, Magistère Informatique et Télécommunications, 1ère année, 2010-2013, (CM 12h/an)
ENSEIRB-MATMECA, 2012-2013, (CM 16h/an)
Security of Hardware/Software Cryptosystems: Physical Attacks and Countermeasures
Master 2 Logiciels pour les Systèmes embarqués, 2015, (CM 4h/year)
Matisse Doctoral School, 2013, (CM 6h/year) [PDF file]
Architectures et programmation multiprocesseurs (multicoeurs/OpenMP, GPU/CUDA)
ENSSAT Lannion, EEI, 3ème année, 2012-2015, (CM 10h + TP 10h /an)
Programmation GPU / CUDA
ENSSAT Lannion, EEI, 3ème année, 2011-2012, (CM 2h + TP 8h /an)

Organisation et cours d'écoles thématiques

Co-organisation et cours à l'école thématique ARCHI15 : Architectures des systèmes matériels enfouis et méthodes de conception associées (8-12 juin, 2015, Lille)     [ slides PDF: Processor Extensions for Security ]

Cours à l'école thématique ECOFAC2014 : Conception faible consommation pour les systèmes embarqués temps réel (19-23 mai 2014, Lorient)

Co-organisation et cours à l'école thématique ARCHI13 : Architectures des systèmes matériels enfouis et méthodes de conception associées (25-29 mars, 2013, Col-de-Porte)     [ slides PDF: Introduction to FPGA Circuits ]

Co-organisation et cours à l'école thématique ECOFAC2012 : Conception faible consommation pour les systèmes embarqués temps réel (21-25 mai 2012, La Colle-sur-Loup)

Co-organisation et cours à l'école thématique ARCHI11 : Architectures des systèmes matériels enfouis et méthodes de conception associées (2 - 6 mai, 2011, Mont-Louis)

Co-organisation et cours à l'école thématique ECOFAC2010 : Conception faible consommation pour les systèmes embarqués temps réel (29 mars - 2 avril, 2010, Plestin les Grèves, Côtes d'Armor)

Co-organisation et cours à l'école thématique ARCHI09 : Architectures des systèmes matériels enfouis et méthodes de conception associées (30 mars - 3 avril, 2009, Pleumeur-Bodou)

Co-organisation et cours à l'école thématique ARCHI07 : Architectures des systèmes matériels enfouis et méthodes de conception associées (19-23 mars, 2007, Boussens)

Organisation et cours à l'école thématique ARCHI05 : Architectures des systèmes matériels enfouis et méthodes de conception associées (21-25 mars, 2005, Autrans)

Co-organisation et cours à l'école thématique ARCHI03 : Architectures des systèmes matériels enfouis et méthodes de conception associées (31 mars - 4 avril, 2003, Roscoff)


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Contact

Arnaud Tisserand

E-mail :
Arnaud.Tisserand@irisa.fr
* Warning: my email is automatically filtered, messages tagged as "SPAM" will be discarded
* Attention : mes émails sont triés automatiquement, les messages étiquetés "SPAM" seront détruits
Tel :
(+33) (0)2 96 46 90 27
Fax :
(+33) (0)2 96 46 01 99 (mention/préciser A. Tisserand)
Address/Adresse :
IRISA-CAIRN. Campus ENSSAT. 6 rue Kerampont. CS 80518. 22305 Lannion cedex. France

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Vitae

Short biography

Arnaud Tisserand, PHD 1997 and HDR 2010, is senior researcher ("directeur de recherche" in french) at CNRS (French National Center for Scientific Research) in computer science in IRISA laboratory and the CAIRN research group. His research interests include computer arithmetic, computer architecture, digital security, VLSI and FPGA design, design automation, low-power design and applications in applied cryptography, scientific computing, digital signal processing. He taught computer arithmetic, computer architecture and VLSI design. He was PC co-chair of ARITH-22 Symposium. He is Associate Editor of the IEEE Transactions on Computers. He is a senior member of the IEEE (SSCS, CAS) and member of the ACM and IACR.

CV

fichier PDF (in french, version 2008/04)

Arnaud Tisserand
Last modified: Fri Jul 1 15:51:17 CEST 2016