Email: Arnaud.Tisserand@irisa.fr ( * )
Computer arithmetic : operations, elementary functions, number systems...
Computer architecture : general and special purpose processors, computation units...
Hardware accelerators : ASIC, FPGA and GPU
Software libraries : arithmetic for crypto, finite field arithmetic
VLSI design and CAD tools : ASIC and FPGA circuits, asynchronous circuits, low power consumption, circuit generation tools
Applications : scientific computing, digital signal processing, image processing, digital control, cryptography, security.
Best paper award with Romain Michard and Nicolas Veyrat-Charvillon at ASAP 2005 for our paper on Small FPGA polynomial approximations with 3-bit coefficients and low-precision estimations of the powers of x [PDF]
2012: CNRS PICS Project SPiNaCH (Secure and low-Power sensor Networks Circuits for Healthcare embedded applications) with Codes and Cryptography Research Group, University College Cork, Ireland
2011+: Labex CominLabs (on Security and Energy topics)
Animation of a working group on hybrid hardware/software security
2011-2015: ARDYT (Reliable and Reconfigurable Dynamic Architecture) project with IRISA, Lab-STICC, LCIM and Atmel (funded by ANR Programme "Ingénerie Numérique et Sécurité" 2011)
2009+: collaboration with the VLSI CAD laboratory, University of Massachusetts, Amherst USA
2008+: collaboration with the CISaC laboratory, University of Calgary Canada
2007-2010: ROMA (Reconfigurable Operators for Multimedia Applications) project with IRISA, CEA LIST and THOMSON France R&D (funded by ANR Programme "Architectures du Futur" 2006)
2006+: collaboration with the Codes and Cryptography Research Group, University of Cork, Ireland, (EGIDE grant)
Invited talk at Journée sécurité numérique du GDR SoC-SiP (Nov. 2011) on Hardware Arithmetic Operators for Elliptic Curve Cryptography (ECC)
Talk at SAV CAIRN 2010 (Dec. 2010) on Examples of Standard and Exotic Number Systems
Seminar at the Electrical & Computer Engineering Departement, University of Massachussets Amherst (Nov. 10): Hardware Evaluation of Functions using Optimized Polynomial Approximations
Exposé de vulgarisation lors de la Fête de la Science en octobre 2010 sur le thème "puces électroniques et sécurité numérique"
Invited seminar at the Center for Advanced Security Research Darmstadt (CASED) Germany (Apr. 2010): Secured Arithmetic Operators for Cryptography
Invited seminar at the Computer Science and Telecommunications Departement, École Normale Supérieure de Cachan, antenne de Bretagne (Mar. 2010): Exotic Number Systems for Hardware Arithmetic Operators
CAIRN seminar, Nov. 2009: Introduction to Elliptic Curve Cryptography (ECC) Hardware Implementation
Invited seminar at the Electrical & Computer Engineering Departement, University of Massachussets Amherst (Nov. 09): Secured Arithmetic Operators for Cryptography
ARITH 20, ARITH 19, ARITH 18, ARITH 17, ARITH 16, ARITH 14
Links to colleagues and groups
GPU Computing : GPGPU (Univ. Perpignan)
SAGE: a free open-source mathematics software system (book in french)
ACI sécurite informatique, projet OCAM (Opérateurs Cryptographiques et Arithmétique Matérielle)
ACI cryptographie, projet OPAC (Opérateurs Arithmétiques pour la Cryptographie)
GDR du CNRS : ASR (ex ARP), IM (ex ALP), ISIS, SOC
ACM: digital library, conferences, publications, special interest groups [ SIGACT, SIGARCH, SIGBED, SIGDA, SIGMICRO, SIGSAC ]
IEEE: digital library, societies : [ CAS, CS, ITS, SSCS ]
Création du Groupe Thématique SMAI-MAIRCI
Workshops CryptArchi
Edition: International Journal of High Performance Systems Architecture
Interstices (site de culture scientifique autour de l'informatique)
Karim Bigou, (1st year/3), INRIA/DGA/IRISA
Franck Bucheron, (1st year/3), DGA/IRISA, co-advisor: B. Martin
Thomas Chabrier, (3rd year/3), IRISA, administrative co-advisor: E. Casseau
Danuta Pamula, (3rd year/3), IRISA
Links on softwares: AFUL
Master 2 Recherche, Université Rennes 1 et ENSSAT Lannion, opérateurs arithmétiques (CM 6h)
Magistère Informatique et Télécommunications, ENS Cachan Antenne de Bretagne, 1ère année, arithmétique des ordinateurs (CM 12h)
Elèves EEI/LSI, 3ème année, ENSSAT Lannion, programmation sur GPU (CM 2h + TP 8h)
Co-organisation de l'école thématique ECOFAC2012 : Conception faible consommation pour les systèmes embarqués temps réel (21-25 mai 2012, La Colle-sur-Loup)
Co-organisation de l'école thématique ARCHI11 : Architectures des systèmes matériels enfouis et méthodes de conception associées (2 - 6 mai, 2011, Mont-Louis)
Co-organisation de l'école thématique ECOFAC2010 : Conception faible consommation pour les systèmes embarqués temps réel (29 mars - 2 avril, 2010, Plestin les Grèves, Côtes d'Armor)
Co-organisation de l'école thématique ARCHI09 : Architectures des systèmes matériels enfouis et méthodes de conception associées (30 mars - 3 avril, 2009, Pleumeur-Bodou)
Co-organisation de l'école thématique ARCHI07 : Architectures des systèmes matériels enfouis et méthodes de conception associées (19-23 mars, 2007, Boussens)
Organisation de l'école thématique ARCHI05 : Architectures des systèmes matériels enfouis et méthodes de conception associées (21-25 mars, 2005, Autrans)
Co-organisation de l'école thématique ARCHI03 : Architectures des systèmes matériels enfouis et méthodes de conception associées (31 mars - 4 avril, 2003, Roscoff)
Cours d'arithmétique des ordinateurs dans le Master 2 Recherche Signal et Systèmes Embarqués de l'ENSSAT (années 2008/2009 et 2009/2010)
Cours écoles doctorales de l'ENS Lyon : cours sur l'arithmétique des ordinateurs (programmes C et Maple)
Cours de "Circuits intégrés numériques" dans le Master 2 recherche spécialité Informatique Fondamentale de l'ENS Lyon (description du cours)
Arnaud Tisserand was born on Mar. 25, 1971 in Bourg-en-Bresse, France. He earned his HDR, Habilitation à Diriger des Recherches, (2010) in Computer Science from University of Rennes. He earned his Ph.D. (1997) and M.Sc. (1994) in Computer Science from the École Normale Supérieure de Lyon (ENS Lyon), France and B.Sc. (1991) in Mechanical Engineering from the University of Lyon. From Oct. 1997 to Sep. 1999, he was a research expert in the Ultra-Low Power Group of the Centre Suisse d'Électronique et de Microtechnique (CSEM), in Neuchâtel, Switzerland. From Oct. 1999 to Sep. 2005, he was a researcher at the French National Institue for Research in Computer Science and Control (INRIA) in the Arénaire group of the Laboratoire de l'Informatique du Parallélisme (LIP) in Lyon, France. Since Oct. 2005, he has a full-time research position at the French National Center for Scientific Research (CNRS). From Oct. 2005 to Nov 2008, he was in the Montpellier Laboratory of Computer Science, Robotics, and Microelectronics (LIRMM) and member and former head (2007-2008) of the arithmetic group (ARITH) group. Since Dec. 2008, he is a member of the Institut de recherche en informatique et systèmes aléatoires (IRISA) laboratory and the CAIRN research group. His research interests include computer arithmetic, computer architecture, VLSI and FPGA design, design automation, low-power design and applications in scientific computing, digital signal processing and cryptography. He taught computer arithmetic, computer architecture and VLSI design. He is a senior member of the IEEE (SSCS, CAS) and member of the ACM and IACR.
fichier PDF (in french, version 2008/04)